發表期刊論文(5)

1. 羅浩榮, "A Routing Algorithm and Generalization for Cube-Connected Cycle Networks," Transactions on Information and Systems, Vol. E80-D/ No. 9, pp. 829-836, Aug. 1997. (SSCI, EI)
2. 羅浩榮, "A Unidirectional CORDIC Algorithm for Angle C-omputation and Rotation," Journal of the Chinese Institute of Engineers, Vol.20/ No.6, pp. -, Aug. 1997. (EI)
3. 羅浩榮, "A Uniform and Squared direct Two's Complement Multiplier," Journal of Information Science and Engineering, Vol. 13/ No. 1, pp. 171-178, Aug. 1996. (EI)
4. 羅浩榮, "An Implementation of the Conditional-Sum Scheme Embedded in a Signed Digital Adder," Journal of the Chinese Institute of Engineers, Vol. 19/ No. 5, pp. 633-643, Aug. 1996. (SCI, EI)
5. 羅浩榮, "An Unidirectional CORDIC Algorithm for Angle Computation and Rotation," Journal of the Chinese Institute of Engineers, Vol. 20/ No. 6, pp. -, Aug. 1996. (SCI, EI)

會議論文(1)

1. 羅浩榮、林秀峰, "A High-Speed of Self-Timing Carry-Completion for Direct Two’s Complement Multipliers，," Proceedings of Proceeding of IEEE Asia Conference on Circuit and System, pp. 643~646, Jan. 1999. Taiwan.

國科會計畫(14)

1. 一個均勻且為方陣形的直接二補數乘法器之研製及電路偵錯成本模式估算之建立與模擬/1997-08-01 ~1998-07-31 /NSC87-2213-E-035-003 /
2. 高速餘數乘法器及混合餘數轉換器最佳化之設計與研製/1996-08-01 ~1997-07-31 /NSC86-2213-E-035-027 /
3. 32位元高速循序帶號乘法器VLSI之設計與製作/1995-08-01 ~1996-07-31 /NSC 85-2215-E-035-005 /
4. 高速及多功能協同運算處理器之研製/1995-02-01 ~1995-07-31 /NSC 84-2213-E-035-014 /
5. 高速及多功能協同運算處理器之研製/1994-02-01 ~1995-07-31 /NSC83-0408-E-035-004 /
6. 管線式輸入輸出之VLSI乘法器之改進/1993-02-01 ~1994-01-31 /NSC82-0404-E-035-022 /
7. 高速及多功能協同運算處理器之研製(Ⅱ)/1993-02-01 ~1994-01-31 /NSC82-0408-E-035-057 /
8. 高速及多功能協同運算處理器之研製(一)/1992-02-01 ~1993-01-31 /NSC81-0408-E-035-508 /
9. Booth定理法則應用於心縮式陣列數位濾波器/1991-08-01 ~1992-07-31 /NSC81-0408-E-035-02 /
10. 以單元電路設計高效率之m/n碼全自我檢查器/1980-02-01 ~1981-01-31 /NSC 80-0408-E035-04 /
11. 自動檢測錯誤的餘數算術運算器/1979-02-01 ~1980-01-31 /NSC 79-0408-E035-05 /
12. 高速的混合浮點及對數系統處理器/1979-02-01 ~1980-01-31 /NSC 79-0408-E035-04 /
13. 餘數數字系統之快速傅利葉轉換處理器的容錯設計/1978-02-01 ~1979-01-31 /NSC 78-0408-E035-01 /
14. 以管線及平行處理之高速VLSI運算器/1977-12-01 ~1979-01-31 /NSC 78-0408-E035-02 /

校外獎勵及指導學生獲獎(8)

1. 86/國科會甲種獎勵 /行政院國科會/ 1997-08-01/A ROUTING ALGORITHM AND GENERALIZATION FOR CUBE-CONNECTED
2. 85/國科會甲種獎勵 /行政院國科會/ 1996-08-01/具符號數位條件和之加法器
3. 84/國科會甲種獎勵 /行政院國科會/ 1995-08-01/平衡自除式Ｎ模組容錯系統新設計
4. 82/國科會甲種獎勵 /行政院國科會/ 1993-08-01/四進位元管線式乘法器
5. 81/國科會優等獎勵 /行政院國科會/ 1992-08-01/對稱式具偵錯功能之餘數快速超大型積體電路乘法器
6. 80/國科會優等獎勵 /行政院國科會/ 1991-08-01/高速積體電路乘法器
7. 79/國科會甲種獎勵 /行政院國科會/ 1990-08-01/具重置性之多模組容錯系統
8. 78/國科會甲種獎勵 /行政院國科會/ 1989-08-01/應用分散式D-法則以建立組合電路測試模組